Feds Launching $300M CHIPS R&D Funding Competition
The federal government is launching an open competition for new research and development (R&D) activities to establish and boost domestic manufacturing capacity for advanced packaging substrates and substrate materials, a key technology for packaging semiconductors.
The five-year, $300 million project will invite interested applicants to submit preliminary information to qualify for the National Advanced Packaging Manufacturing Program, according to the Notice of Intent (NOI) posted recently in the Federal Register. Multiple awards of up to $100 million each, not including voluntary co-investment, are anticipated.
The CHIPS Research & Development Office within the National Institute of Standards and Technology (NIST) at the U.S. Department of Commerce said it has issued the NOI to provide potential applicants with preliminary information for the purpose of “facilitating the development of meaningful partnerships and strong, responsive proposals.”
CHIPS R&D said that it expects eligible applicants and subrecipients to include for-profit organizations; non-profit organizations; accredited institutions of higher education including community and technical colleges; state and local governments.
Full details about the competition will be available in March when a Notice of Funding Opportunity (NOFO) is published at www.grants.gov. Information will also be made available about the CHIPS R&D Materials and Substrates competition at the CHIPS for America website.
Concept papers will be due within 35 days after the NOFO is published, and only those potential applicants invited to fully apply after the concept paper stage will be considered.
The CHIPS and Science Act appropriated approximately $50 billion to the Department of Commerce — $39 billion in incentives to onshore semiconductor manufacturing and $11 billion to advance U.S. leadership in semiconductor R&D. Within CHIPS for America, CHIPS R&D is working to accelerate the development and commercial deployment of foundational semiconductor technologies by establishing, connecting, and providing access to domestic research efforts, tools, resources, workers, and facilities.
The National Advanced Packaging Manufacturing Program, one of multiple CHIPS R&D initiatives, seeks to drive U.S. leadership in advanced packaging and provide the technology and skilled workforce needed for packaging manufacturing in the United States. NAPMP is investing a $3 billion for programs that include an advanced packaging piloting facility for validating and transitioning new technologies to U.S. manufacturers, workforce training programs to ensure capable staffing for new processes and tools, and funding for projects.
Emerging technologies like artificial intelligence, advanced telecommunications, biomedical devices, and autonomous vehicles require leap-ahead advances in microelectronics capabilities. Improving all aspects of system performance to support the breadth of new semiconductor applications will require advanced packaging and related capabilities to address the need to integrate multi-component-assemblies with large numbers of interconnects to achieve a degree of integration that blurs the line between chip and package.
In particular, the ability to “scale-down and scale-out” will be critical. “Scale-down” refers to shrinking the size of the features on the package and “scale-out” refers to increasing the number of chips assembled on the substrate.